Design Engineer To Verification Engineer

Are you a Design Engineer and now started looking into Verification. Might me my experience in changing my mindset and the new things I am learning or new angle I am looking, to become a Verification Engineer will help you. This post I wanted to update every time I get into different (different from Designer point of view) things.

Earlier I was in a wrong impression that Verification is a bit easy compared to Design (might be you don't need to draw a Micro-Architecture, construct an FSM). Yes!!! If you want to become a good verification engineer, first stop thinking in terms of micro-archs, gates, fsms, timing optimization etc., so far in which are very familier. You are going to start think in terms of classes, tasks, functions which are going to trouble your previous role - The Designer.

I want to put some useful stuff here for a novice in verification and who did some design work already. The informaation I provide here might not be in a proper order, but I will re-arrange the data once a good amount of information is available with me.

Compiler and Simulation Directives:

In a design you have two components and any one of them will be you are going to synthesize depending on some parameter in the design (Ex: You want to synthesize an SRAM which can be of two vendors). What we will do? We take a text_macro VENDOR_1 and put this text_macro to select one of the vendors.

`ifdef VENDOR_1
sram vendor_1_sram(...);
`else
`ifdef VENDOR_2
sram vendor_2_sram(...);
`endif
`endif

If-else-if is a compiler directive. Now let us say in your testbench you want to take data from one of two files, you may follow the same procedure using compiler directives.
`ifdef FILE_X fp0 = fopen(“file_x”,”r”);
`else
ifdef FILE_Y fp0 = fopen(“file_y”,”r”);
`endif
`endif
And you may compile with +define+FILE_X or +define+FILE_Y. This works fine. But every time you want to simulate with different file, by changing the file name through the +define, the compiler have to recompile. For large projects the compilation time is considerable. To avoid this we should use simulator directive rather than compiler directives. These are the system functions. $test$plusargs and $value$plusargs.
if ($test$plusargs("file_x")) begin
$value$plusargs("file_x=%d", file_x);
end else begin
$display($time, " ERROR MESSAGE");
end

$test$plusargs will check whether the specified argument is present or not. If the argument is not passed, we can give an error message saying that so and so argument was miising. $value$plusargs system function searches the list of arguments for the specified plusarg string. "file_x" in the above case. If the string is found, the remainder of the string is converted to the type specified (%d : integer in the above case) stored in the variable provided. If a string is found, the function returns a non-zero integer. If no string is found matching, the function returns the integer value zero and the variable provided is not modified. I will extend this post with some other stuff soon.